1. Field
The subject invention relates to processing of substrates, especially for processing substrates fabricated to operates as photovoltaic cells.
2. Related Art
Substrate processing tools are used to make hard-drive disks, semiconductor computer chips, solar panels, and the like, from substrates made of materials such as semiconductor wafers, glass, stainless steel, etc. Typically, the substrate processing tools includes several substrate chambers that perform various processes that modify the substrate, such as, deposition, cleaning, etch, heat/cool, etc. While in the semiconductor fabrication field the various processing steps, such as deposition and etch, are performed on only selected parts of the substrate, in hard-drive disks and solar processing the processing is generally performed over the entire surface of the substrate.
For example, it is known in the semiconductor processing field to delineate the various circuit elements by forming masks over the surface of the substrate. The masks are generally made of photoresist, which is exposed to radiation and development to form the desired pattern. Then the substrate is processed in the chamber to transfer the pattern to the selected layer of the substrate, sometimes by first transferring the pattern onto a secondary hard mask. Thereafter, the mask is removed and the surface of the substrate is cleaned and prepared for the next mask. This sequence is repeated many times as the various layers are formed over the substrate by repeatedly forming and removing masks of different designs. It should be appreciated that the use of such masks, while indispensable in the semiconductor art, dramatically increases the time and costs of fabricating semiconductor circuits.
In hard-drive disks and solar fabrication, on the other hand, generally no individual cells are formed, but rather various layers are formed over the entire substrate so as to generate a stack of various materials that function as magnetic memory or photovoltaic cell, respectively. For example, in most of the solar cells, the various layers generally include a back contact layer, an absorption layer (e.g., p-type), a complementary layer, which is generally referred to as buffer or window layer (e.g., n-type), transparent top contact layer, and a protective and/or anti-reflective layer. For example, when forming copper-indium-gallium-selenide (CIGS) solar cells, a back conductor layer, such as molybdenum, is first formed over the substrate, followed by a layer of p-type CIGS layer, followed by buffer layer of n-type, e.g., cadmium sulfide, CdS, followed by a transparent conductive layer, e.g., zinc oxide, ZnO or indium tin oxide, ITO.
Due to the solar cell structure, the material usually chosen for the top conductive layer generally has high resistance. Therefore, in order to increase current collection from the cell, a pattern or grid of higher conductivity material is fabricated on top of the stack. This top grid is generally made of conductive paste, such as silver paste, using silk screen or inkjet-style printing technology. However, it is desirable to develop technology to enable fabrication of patterned conductive layer of higher quality and less resistivity than achievable using the printing technology.
Additionally, in certain solar cells structure a short or shunt is sometimes inadvertently formed at the edge of the substrate between the bottom and top conductive layers. This problem is especially problematic with CIGS thin film solar cells. Prior art methods utilized for removal of such shunts include wet bath etching, batch plasma etching, and laser scribing. In wet etching the wafer is placed on the surface of an acid solution in a bath, a small wave is created in the bath so that the acidic solution contacts the wafer and the surface tension of the liquid provides uniform etching of the back surface of the wafer. In batch etching the wafers are stacked together like coins and placed in a barrel-type etcher, so that only the periphery of the stacked wafers is etched. In laser scribing, laser beam is used to scribe a groove almost at the edge of the wafer. However, it is desirable to provide technology that provides better solution to edge shunt.